ce0ee6c054
* adds patch to remove unused kernel components * new boards, rebase patches to match * rename boards for deployment
100 lines
3.6 KiB
Diff
100 lines
3.6 KiB
Diff
diff --git a/chips/nrf52/src/uicr.rs b/chips/nrf52/src/uicr.rs
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index 6bb6c86b7..3bb8b5a7d 100644
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--- a/chips/nrf52/src/uicr.rs
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+++ b/chips/nrf52/src/uicr.rs
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@@ -1,38 +1,45 @@
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//! User information configuration registers
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-//!
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-//! Minimal implementation to support activation of the reset button on
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-//! nRF52-DK.
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+
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use enum_primitive::cast::FromPrimitive;
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-use kernel::common::registers::{register_bitfields, ReadWrite};
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+use kernel::common::registers::{register_bitfields, register_structs, ReadWrite};
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use kernel::common::StaticRef;
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+use kernel::hil;
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+use kernel::ReturnCode;
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use crate::gpio::Pin;
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const UICR_BASE: StaticRef<UicrRegisters> =
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- unsafe { StaticRef::new(0x10001200 as *const UicrRegisters) };
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-
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-#[repr(C)]
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-struct UicrRegisters {
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- /// Mapping of the nRESET function (see POWER chapter for details)
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- /// - Address: 0x200 - 0x204
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- pselreset0: ReadWrite<u32, Pselreset::Register>,
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- /// Mapping of the nRESET function (see POWER chapter for details)
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- /// - Address: 0x204 - 0x208
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- pselreset1: ReadWrite<u32, Pselreset::Register>,
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- /// Access Port protection
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- /// - Address: 0x208 - 0x20c
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- approtect: ReadWrite<u32, ApProtect::Register>,
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- /// Setting of pins dedicated to NFC functionality: NFC antenna or GPIO
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- /// - Address: 0x20c - 0x210
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- nfcpins: ReadWrite<u32, NfcPins::Register>,
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- _reserved1: [u32; 60],
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- /// External circuitry to be supplied from VDD pin.
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- /// - Address: 0x300 - 0x304
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- extsupply: ReadWrite<u32, ExtSupply::Register>,
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- /// GPIO reference voltage
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- /// - Address: 0x304 - 0x308
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- regout0: ReadWrite<u32, RegOut::Register>,
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+ unsafe { StaticRef::new(0x10001000 as *const UicrRegisters) };
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+
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+register_structs! {
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+ UicrRegisters {
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+ (0x000 => _reserved1),
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+ /// Reserved for Nordic firmware design
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+ (0x014 => nrffw: [ReadWrite<u32>; 13]),
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+ (0x048 => _reserved2),
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+ /// Reserved for Nordic hardware design
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+ (0x050 => nrfhw: [ReadWrite<u32>; 12]),
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+ /// Reserved for customer
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+ (0x080 => customer: [ReadWrite<u32>; 32]),
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+ (0x100 => _reserved3),
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+ /// Mapping of the nRESET function (see POWER chapter for details)
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+ (0x200 => pselreset0: ReadWrite<u32, Pselreset::Register>),
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+ /// Mapping of the nRESET function (see POWER chapter for details)
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+ (0x204 => pselreset1: ReadWrite<u32, Pselreset::Register>),
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+ /// Access Port protection
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+ (0x208 => approtect: ReadWrite<u32, ApProtect::Register>),
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+ /// Setting of pins dedicated to NFC functionality: NFC antenna or GPIO
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+ /// - Address: 0x20c - 0x210
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+ (0x20c => nfcpins: ReadWrite<u32, NfcPins::Register>),
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+ (0x210 => debugctrl: ReadWrite<u32, DebugControl::Register>),
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+ (0x214 => _reserved4),
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+ /// External circuitry to be supplied from VDD pin.
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+ (0x300 => extsupply: ReadWrite<u32, ExtSupply::Register>),
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+ /// GPIO reference voltage
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+ (0x304 => regout0: ReadWrite<u32, RegOut::Register>),
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+ (0x308 => @END),
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+ }
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}
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register_bitfields! [u32,
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@@ -58,6 +65,21 @@ register_bitfields! [u32,
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DISABLED = 0xff
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]
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],
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+ /// Processor debug control
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+ DebugControl [
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+ CPUNIDEN OFFSET(0) NUMBITS(8) [
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+ /// Enable
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+ ENABLED = 0xff,
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+ /// Disable
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+ DISABLED = 0x00
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+ ],
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+ CPUFPBEN OFFSET(8) NUMBITS(8) [
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+ /// Enable
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+ ENABLED = 0xff,
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+ /// Disable
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+ DISABLED = 0x00
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+ ]
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+ ],
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/// Setting of pins dedicated to NFC functionality: NFC antenna or GPIO
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NfcPins [
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/// Setting pins dedicated to NFC functionality
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