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Bump Tock kernel version (#374)

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* Bump Tock kernel version

* Update boards to new kernel

* Update patches to new kernel

* Update PR template

* Bump libtock-rs

* Use new layout from libtock-rs

* Fix clippy warnings due to updated toolchain

* Fix new toolchain file format

* Bump elf2tab to v0.7.0

* Fix worklow and setup.sh script to use the TOML rust-toolchain file

* New libtock-rs style of declaring the stack.

* Fix padding in layout file.

The layout from libtock-rs generates invalid flash padding.
The value is 32-bit and therefore setting padding to 0xff yields
0xff000000 instead of 0xffffffff that we want.

* adds tock patch for app break hard fault

* sets in deploy, removed patch 04-mpu-fix

* fixed the if deploy

* fixes indentation

* updates board names in install.md

* fix docs and deploy style

Co-authored-by: Fabian Kaczmarczyck <kaczmarczyck@google.com>
Co-authored-by: kaczmarczyck <43844792+kaczmarczyck@users.noreply.github.com>
This commit is contained in:
Jean-Michel Picod
2021-09-10 08:32:34 +02:00
committed by GitHub
parent c2b3aeca88
commit c1f2551d0d
48 changed files with 617 additions and 732 deletions
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143
patches/tock/04-update-uicr.patch Normal file
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@@ -0,0 +1,143 @@
diff --git a/boards/nordic/nrf52_components/src/startup.rs b/boards/nordic/nrf52_components/src/startup.rs
index e6cf3ff56..7b3ea5a59 100644
--- a/boards/nordic/nrf52_components/src/startup.rs
+++ b/boards/nordic/nrf52_components/src/startup.rs
@@ -53,6 +53,9 @@ impl<'a> Component for NrfStartupComponent<'a> {
erase_uicr |= !uicr.is_nfc_pins_protection_enabled();
}
+ // Avoid killing the DFU bootloader if present
+ let (dfu_start_addr, dfu_settings_addr) = uicr.get_dfu_params();
+
if erase_uicr {
self.nvmc.erase_uicr();
}
@@ -62,6 +65,11 @@ impl<'a> Component for NrfStartupComponent<'a> {
let mut needs_soft_reset: bool = false;
+ // Restore DFU bootloader settings if we erased
+ if erase_uicr {
+ uicr.set_dfu_params(dfu_start_addr, dfu_settings_addr);
+ }
+
// Configure reset pins
if uicr
.get_psel0_reset_pin()
diff --git a/chips/nrf52/src/uicr.rs b/chips/nrf52/src/uicr.rs
index 4924bbd44..788533210 100644
--- a/chips/nrf52/src/uicr.rs
+++ b/chips/nrf52/src/uicr.rs
@@ -1,38 +1,44 @@
//! User information configuration registers
-//!
-//! Minimal implementation to support activation of the reset button on
-//! nRF52-DK.
use enum_primitive::cast::FromPrimitive;
-use kernel::common::registers::{register_bitfields, ReadWrite};
+use kernel::common::registers::{register_bitfields, register_structs, ReadWrite};
use kernel::common::StaticRef;
+use kernel::hil;
+use kernel::ReturnCode;
use crate::gpio::Pin;
const UICR_BASE: StaticRef<UicrRegisters> =
- unsafe { StaticRef::new(0x10001200 as *const UicrRegisters) };
-
-#[repr(C)]
-struct UicrRegisters {
- /// Mapping of the nRESET function (see POWER chapter for details)
- /// - Address: 0x200 - 0x204
- pselreset0: ReadWrite<u32, Pselreset::Register>,
- /// Mapping of the nRESET function (see POWER chapter for details)
- /// - Address: 0x204 - 0x208
- pselreset1: ReadWrite<u32, Pselreset::Register>,
- /// Access Port protection
- /// - Address: 0x208 - 0x20c
- approtect: ReadWrite<u32, ApProtect::Register>,
- /// Setting of pins dedicated to NFC functionality: NFC antenna or GPIO
- /// - Address: 0x20c - 0x210
- nfcpins: ReadWrite<u32, NfcPins::Register>,
- _reserved1: [u32; 60],
- /// External circuitry to be supplied from VDD pin.
- /// - Address: 0x300 - 0x304
- extsupply: ReadWrite<u32, ExtSupply::Register>,
- /// GPIO reference voltage
- /// - Address: 0x304 - 0x308
- regout0: ReadWrite<u32, RegOut::Register>,
+ unsafe { StaticRef::new(0x10001000 as *const UicrRegisters) };
+
+register_structs! {
+ UicrRegisters {
+ (0x000 => _reserved1),
+ /// Reserved for Nordic firmware design
+ (0x014 => nrffw: [ReadWrite<u32>; 13]),
+ (0x048 => _reserved2),
+ /// Reserved for Nordic hardware design
+ (0x050 => nrfhw: [ReadWrite<u32>; 12]),
+ /// Reserved for customer
+ (0x080 => customer: [ReadWrite<u32>; 32]),
+ (0x100 => _reserved3),
+ /// Mapping of the nRESET function (see POWER chapter for details)
+ (0x200 => pselreset0: ReadWrite<u32, Pselreset::Register>),
+ /// Mapping of the nRESET function (see POWER chapter for details)
+ (0x204 => pselreset1: ReadWrite<u32, Pselreset::Register>),
+ /// Access Port protection
+ (0x208 => approtect: ReadWrite<u32, ApProtect::Register>),
+ /// Setting of pins dedicated to NFC functionality: NFC antenna or GPIO
+ /// - Address: 0x20c - 0x210
+ (0x20c => nfcpins: ReadWrite<u32, NfcPins::Register>),
+ (0x210 => debugctrl: ReadWrite<u32, DebugControl::Register>),
+ (0x214 => _reserved4),
+ /// External circuitry to be supplied from VDD pin.
+ (0x300 => extsupply: ReadWrite<u32, ExtSupply::Register>),
+ /// GPIO reference voltage
+ (0x304 => regout0: ReadWrite<u32, RegOut::Register>),
+ (0x308 => @END),
+ }
}
register_bitfields! [u32,
@@ -58,6 +64,21 @@ register_bitfields! [u32,
DISABLED = 0xff
]
],
+ /// Processor debug control
+ DebugControl [
+ CPUNIDEN OFFSET(0) NUMBITS(8) [
+ /// Enable
+ ENABLED = 0xff,
+ /// Disable
+ DISABLED = 0x00
+ ],
+ CPUFPBEN OFFSET(8) NUMBITS(8) [
+ /// Enable
+ ENABLED = 0xff,
+ /// Disable
+ DISABLED = 0x00
+ ]
+ ],
/// Setting of pins dedicated to NFC functionality: NFC antenna or GPIO
NfcPins [
/// Setting pins dedicated to NFC functionality
@@ -172,6 +193,18 @@ impl Uicr {
self.registers.nfcpins.matches_all(NfcPins::PROTECT::NFC)
}
+ pub fn get_dfu_params(&self) -> (u32, u32) {
+ (
+ self.registers.nrffw[0].get(), // DFU start address
+ self.registers.nrffw[1].get(), // DFU settings address
+ )
+ }
+
+ pub fn set_dfu_params(&self, dfu_start_addr: u32, dfu_settings_addr: u32) {
+ self.registers.nrffw[0].set(dfu_start_addr);
+ self.registers.nrffw[1].set(dfu_settings_addr);
+ }
+
pub fn is_ap_protect_enabled(&self) -> bool {
// Here we compare to DISABLED value because any other value should enable the protection.
!self